DCF77 Receiver 4455

receiver 4455 with DCF77-decoding In principle the board contains three modules:

The integrated receiver U2900B/FP as customer designed IC with improved input wiring for the noise suppression,
a microprocessor unit with controllable reception and simulation programs,
output unit for pulses (option).

The DCF77-signal is decoded by the microprocessor. The simulated DCF77-signal is available as output.

This creates several advantages:

The processor bridges a bad reception.
The pulses are exactly 100 or 200 msec. rsp. wide.
There is no reception jitter from second to second.
The pulse edge is far closer to the absolute second time mark.

I/O-Signals

DCF77-Pulse

All models have the DCF77-pulse output at pin 15. After switching on the voltage supply it takes at least 3 minutes of faultless DCF77-reception to achieve the DCF77-pulse.During this time the following checks are carried out:

During the first minute the internal time base is synchronized to the DCF77-second- and minute mark.
During the second minute the first DCF77-time data string is read. After parity and plausibility checks the time data string is loaded into a control clock and continued in second steps.
After another minute the new DCF77-data string is compared with the control clock after the according checks. If both times are the same, the time information is taken over into the base clock. The DCF77-signal is produced from the base clock time.

Even if other reading DCF77-data are faulty the right DCF77-pulse is put out because of this base time. If the reception is interfered for more than 50 minutes the DCF77-pulse is also interfered.

Output Signals (Option)

In addition to the DCF77-pulse other pulses can be read off. The pin row is then extended by the according pin. The signals are TTL compatible and switch from high to low level. Two output groups can be selected by means of jumper.

Pulse Group 1

pin	pulse	width
10	1 second	0,5 sec.
11	1 minute	1 sec.
12	10 minutes	1 sec.
4	15 minutes	1 sec.
16	30 minutes	1 sec.
17	1 hour	1 sec.
18	1 day	1 sec.
19	summer time	permanent pulse

Pulse Group 2

pin	pulse	width
10	1 second	0,5 sec.
11	1 minute	1 sec.
12	10 minutes	1 sec.
4	30 minutes	1 sec.
16	1 hour	1 sec.
17	1 day	1 sec.
18	status
19	status

Status DCF77-Reception

signal
pin 14	pin 13	meaning
H-level	H-level	time not available
L-level	H-level	quartz synchronous
H-level	L-level	radio synchronous
L-Pegel	L-Pegel	radio synchronous

Serial Interface on TTL-Level (option)

Additional to the pulse output there is a serial interface without handshake signals implemented with the hopf 602x standard data string. The signals are available on TTL level, RxD (pin 5) and TxD (pin 20).

Parameter:

baudrate, stopbit, parity, telegram settings: adjustable via jumper

Technical Data

voltage supply: + 5 V DC, ± 5 %
power consumption: max. 300 mW
band width: ca. 40 Hz
control range: ca. 70 dB
input sensitivity: 40 µV
output pulse: TTL-compatibel
negative DCF77-decodingpulse: 100/200 msec. ± 1 msec.
temperature range: 0° C - 50° C
time offset: ± 2 msec.

Download Manuals

4455.pdf

Manual English/German

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